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A Digitally Dynamic Power Supply Technique for 16-Channel 12V-Tolerant Stimulator Realized in a 0.18-μm 1.8-V/3.3-V Low-Voltage CMOS Process

2018-01-17 by admin

A 16-channel 12V-tolerant stimulator has been designed and successfully verified in a 0.18-μm 1.8-V/3.3-V CMOS process. It can be fully integrated with the microcontroller or the biomedical signal processor into an SoC chip fabricated in a low-voltage CMOS technology. The experimental results have shown that the proposed new digitally dynamic power supply technique for multi-channel CCS can greatly improve the power efficiency. The charge mismatch is less than 0.8%, and the residual dc current is less than 14 nA with shorting operation. The reliability measurement of up to hundreds of millions biphasic stimulus cycles in 30 days has been done to verify that the proposed high-voltage-tolerant stimulator is robust, and the performance of charge balance does not degrade.

Publication: Luo Z, Ker MD, Yang TY, Cheng WH, “A Digitally Dynamic Power Supply Technique for 16-Channel 12V-Tolerant Stimulator Realized in a 0.18-μm 1.8-V/3.3-V Low-Voltage CMOS Process,”  IEEE Trans. on Biomedical Circuits and Systems, vol. 11, no. 5, Oct. 2017.

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